The invention relates to complementary metal oxide semiconductor (CMOS) technology and its application to large scale integration (LSI). In general CMOS relates to the combination of an N channel transistor with a P channel transistor to create a basic inverter gate. In digital applications only one of these devices will be on at a time, except during the transitions between logic states. Thus, only switching related current flows and power dissipation is very low. The basic inverter gate can be combined with other gates to create the conventional logic functions.
While it is not often done, the inverter gate can be employed as a linear amplifier. If the P and N channel devices are ratioed so that the gate transition occurs at about V.sub.CC /2, the gate will display substantial gain when biased at V.sub.CC /2 and will have a linear input-output characteristic over a reasonably large range. However, the difficulty of biasing such amplifiers has substantially reduced their utilization.